
Professor of Computer Science
Abhishek's group have worked on memory address translation for several years. AMD has shipped over an estimated one billion Zen CPU cores using coalesced TLBs. NVIDIA has shipped tens of millions of GPUs with TLB optimizations for translation contiguity. Over an estimated two billion Linux operating systems use our code to migrate 2MB pages starting with the 4.14 kernel. These results have, in turn, influenced RISC-V's NAPOT translation contiguity feature and Meta's page placement algorithms for tiered memory systems. All this, and more, is summarized in his book and appendix to the classic Hennessy & Patterson textbook.
His group are also building computer systems that help treat neurological disorders and shed light on brain function. In our HALO project, they are taping out low power and flexible chips for neural interfaces. In his SCALO project, they are building a neural interface that decodes neural signals from multiple brain sites.
He received the 2023 ACM SIGARCH Maurice Wilkes Award "for contributions to memory address translation used in widely available commercial microprocessors and operating systems". His research has been recognized with six Top Picks selections and two honorable mentions, a Best Paper Award at ISCA '23, a Distinguished Paper Award at ASPLOS '23, a visiting CV Starr Fellowship at Princeton Neuroscience, and more. His teaching and mentoring have been recognized with the Yale SEAS Ackerman Award.
Contact Information
- Email Address: abhishek@cs.yale.edu
- Websites:
Research Interests
Computer architectures for classical and neural computing systems